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@ AUATA USHH/dH%( HD$1HG(H\$IPtAuDH5Bj 11HT$dH+%( H[]A\A]A^ H5|| L-9 AD$Ltf D L 1H蚉I9uH5 1肉L$1ʃ1Ѓ1Ш D$ \$DfH& AD1H5{ UD9t% A 1E!M 9 u H59i 1轈L$X 11Ѓ1Шt-L$\$fDA9\$f(H5h 1R9ff. f f U@SHHhdH%( HD$X19odu*kd1HT$XdH+%( Hh[]f. Hf@t$W)D$ H )$)D$$ DHT$UHD$@ D$UD$VHD$VHD$ HG(HT$D$ )D$0P _H H5L 11BC8 UHSHuh tKHG( u"H5h 1 @tˉ] H[]f H@% u"u)ff]EH []f{tU H5:g 11聆f. AWfAAVAA AUMATUSHHx LD$Ht$`$ dH%( H$h 1HD$])D$)D$0HD$P D$ D$]HD$Ht$0DT$`H4$)D$ )D$@ Ač@H4$HLH= IcLH|Ht$s8CD,Ht$H߉D$(HC(P ADž Ll$^L% L5 " D$^tFG- H H)AT0HC(ML HPtH5, 11H$h dH+%( uWHx D[]A\A]A^A_ H H52f 11ل DH 11H5+f 趄1|5ff. HE1E1h 1ҾR Hf. HE1E1h 1Ҿ Hf. HE1E1h 1Ҿ Hf. HE1E1h 1Ҿ Hf. HE1E1h 1Ҿ OHf. HE1E1h' 1Ҿ Hf. HE1E1h 1ҾP Hf. HE1E1h 1Ҿ Hf. HE1E1h' ! H HE1E1h \ \H HE1E1h ,H AUIATIU,
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LP HT$(dH+%( H8[]A\A]A^A_HZ H5a 11H> H5/a 11~D$h9sTI P$ t IF(1 tPHLA Mj
L$(^_FAH H5a 11~ / HHAIо @$% t HG(1 t@HADj
/Hf. AUAATAUHSHHdH%( HD$HP$ @ t HO(1ujLl$DHD$LD$ A xpHE(ILDHPAHD$dH+%( u+HD[]A\A]f. Q. AWAVAUATUSHHG(Dx EtQIIA։ͅupLd$A)tdD9DLDNLHcÉHD$tH[]A\A]A^A_H H5_ 119}H []A\A]A^A_ D H1[]A\A]A^A_ff. @ AWEAVAUIATUSH8HT$(x 1Ht$L$ |$1҉D$At$|$H|$ D$,9 D$l$(|$\$ 9MD$9؉D$N)\$tl\$E1DAEL+d$ Aމ D AA)D9|$v;A9މDLANBt= LHT$2tH8[]A\A]A^A_ Aߋ|$,9|$YH81[]A\A]A^A_f D AVAAUILATUS.HtNI] HLHC$% @-DC LD1HHA+[D]A\A]A^H52 11A ]{ff. HG(D@Et:f. HHe 11H5*^ { Hff. USHHdH%( HD$1@H2P$I@t$uMu8 t@u@khHT$dH+%( u2H[] @1} HG(HL$E11Ҿ P++ff. HhdH%( HD$X1H0 H( H t{HGHtrHWHtiH
2tH9u HtH9tQooO$ oW o_0HD$L$T$(\$8;HT$XdH+%( u)Hhf D H; H5jY 11y8M*ff. f AUATUSHcHi H(-# dH%( HD$1IL)H\$L,$H& .HHHH?HH)IHi ʚ;H)ӐLF)L;,$uH;\$HD$dH+%( u H([]A\A]) H=R# Ht1 HH9uff. U1H0dH%( HD$(1H|$)1H)H $HT$Ht$H|$HH)H9~6HZ{c IH9~-HD$(dH+%( u6H0L] @ }A f D Hi@B H)A HLI(f. AWAVAUATUSH dH%( H$ 1 H- H=B1 HH 9| 1E1L=5BL5*HL-gI WfH MtH M H AA L+CH8HsLsL{HkHKM vHL$LH5Z 11vHL$ MuLH5 [ 11HL$vHL$ H_ LH5[ 11v M? LH5 [ 11ev H LH56[ 11=vA AH T$E1HD$HdH+%( ubHXDA\A] @ H5@X 1A_81LH51X H1_H5=64 busy ready Accessing byte(s):%s%s%s%s
No ROM device found.
Access is a %s.
Device is %s.
device context %s: 0x%02x to 0x%*lx.
not ready after write
not ready after read
%s: 0x%02x from 0x%*lx.
%s: write %i, read %i Zero length command!
Sending , receiving BBIO Raw bitbang mode version %c
Bus Pirate shutdown failed.
%s: writing %u bytes: WRSR wrote 0x%02x.
BYTE PROGRAM size too short!
reading %u bytes: No command sent to the chip!
30k 115200 spispeed serialspeed pullups off irate
Detected Bus Pirate hardware 0123456789 %u.%u ("%s") Detected Bus Pirate firmware HiZ> Using SPI command set v2.
SPI speed is %sHz
Serial speed is %d baud
Raw SPI mode version %c
Enabling pull-up resistors.
%s: Failed to %s %d bytes
Wrote %d bytes:
%02x
Read %d bytes:
dis Couldnt initialize libusb!
%s, writecnt=%i, readcnt=%i
%s: short write
%s: short read
Found a %s
SF100 SF200 SF%d V:%d.%d.%d reset iCE40 Writing %s
No filename specified.
wb bus parallel lpc fwh spi_write_256_chunksize spi_blacklist SPI blacklist is %2x , size %u
spi_ignorelist SPI ignorelist is emulate M25P10.RES SST25VF040.REMS SST25VF032B MX25L6436 W25Q128FV spi_status image matches.
Reading %s
rb Unable to read %s
doesn't match.
Requested buses are: %s
default parallel+lpc+fwh+spi No MSR initialized.
24M voltage Empty voltage= specified.
milliv Garbage voltage= specified.
Setting voltage to %i mV
%c%c%d Error: %s is an invalid id!
Using device %li.
target Using target %s.
Could not initialize libusb!
Could not read id.
Found dediprog id SF%06d.
Using dediprog id SF%06d.
Unexpected response to init!
Disabling standalone mode.
serial not PCI header type 0x%02x
Requested BAR is of type MEM I/O
ROM
, %sbit, %sprefetchable
reserved pci Error: %s
offset Missing argument for offset.
BROM base=0x%08x
Controller not ready.
NVIDIA abit matching %s against %s
Bad header checksum.
Bad table checksum: %04x.
Bad record count: %d.
Stuck at 0x%02x.
No southbridge found for %s!
GCS BIOS_SPI_BC enabled (A16(+) inverted) not enabled %s = 0x%x: Boot BIOS Straps: 0x%x (%s)
Top Swap: %s
SPI Read Configuration:
BIOS_CNTL = 0x%02x: BIOS Lock Enable: %sabled, BIOS Write Enable: %sabled
BYT IBASE fwh_idsel ICH RCRB SPIBAR = 0x%0*lx + 0x%04x
BYT RCRB SPI_BASE_ADDRESS = 0x%x
BYT SBASE STMicroelectronics STLINK-V3 Digilent Development board JTAG Winchiphead (WCH) CH341A Microchip PICkit 2 Marvell 88SX7042 PCI-e 4-port SATA-II Open Graphics Project Development Board OGD1 Intel Silicon Labs Dediprog SF100/SF200/SF600 ITE 8212F PATA RAID Silicon Image SiI 3124 PCI-X SATA Ctrl SiI 3132 SATA Raid II Ctrl Realtek RTL8139/8139C/8139C+ RTL8169 SMC 1211TX 3COM 3C90xB: PCI 10BASE-T (TPO) 3C90xB: PCI 10BASE-FL 3C90xB: PCI 10BASE-FX 3C905B: Cyclone 10/100/BNC unknown system-manufacturer system-product-name system-version baseboard-manufacturer baseboard-product-name baseboard-version AN-M2 ^AV8 AV8 bf6 BF6 ^i440BX-W977 (BM6)$ BM6 IC7 IP35 IP35 Pro KN8 Ultra ^KN9(NF-MCP55 series)$ KN9 Ultra NF7-S NF-M2 nView (VA6)$ VA6 vt6x4 VT6X4 Acorp 6A815EPD AGAMI ARUMA agami Aruma Albatron PM266A Pro artecgroup dbe61 Artec Group DBE61 dbe62 DBE62 AOpen i945GMx-VFX i965GMt-LA i975Xa-YDG ^iMac5,2$ Apple iMac5,2 ^MacBook2,1$ MacBook2,1 ^ConRoeXFire-eSATA2 ASRock ^Kabini CRB$ IMB-A180(-H) ^K7S41 $ K7S41 ^K7S41GX$ K7S41GX P4i65GV 775i65G ASUS A7N8X-VM/400 A7V600-X A7V8X-MX A7V8X-MX SE A7V8X A7V333 A7V8X-X A8AE-LE ^A8J A8Jm NODUSM3 A8M2N-LA (NodusM3-GL8E) NAGAMI2L A8N-LA (Nagami-GL8E) A8N-VM CSM ^DSAN-DX$ DSAN-DX M2NBP-VM CSM M2V-MX ^M6Ne$ M6Ne ^OPLX-M$ OPLX-M ^P2B-N$ P2B-N P4B266-LM P4B266 P4B533-E ^Guppy P4GV-LA (Guppy) P4C800-E Deluxe P4P800 ^P4P800-E$ P4P800-E Deluxe ^P4P800-VM$ P4P800-VM ^P4P800-X$ P4P800-X ^P4P800SE$ P4P800SE ^P4PE-X/TE$ P4PE-X/TE P4SC-E P4SD-LA P4S800-MX ^P5A$ asus p5a P5A ^P5BV-R$ P5BV-R ^P5GD1 PRO$ P5GD1 Pro ^P5GD1-VM$ P5GD1-VM/S P5GD1(-VM) ^P5GD2-Premium$ P5GD2 Premium ^P5GD2-X$ P5GD2-X ^P5GDC-V$ P5GDC-V Deluxe ^P5GDC$ P5GDC Deluxe P5GD2/C variants ^LITHIUM$ P5LP-LE (Lithium-UL8E) ^P5LP-LE$ P5LP-LE (Epson OEM) ^P5LD2$ P5LD2 ^P5LD2-MQ$ P5LD2-MQ ^P5LD2-VM$ P5LD2-VM ^P5LD2-VM DH$ P5LD2-VM DH P5ND2-SLI Deluxe ^P5N-D$ P5N-D ^P5N-E SLI$ P5N-E SLI P5PE-VM ^CUSL2-C ^TUSL2-C ^U38N$ U38N Bcom/Clientron WinNET P680 ^KM266-8235$ biostar m7viq Biostar M7VIQ ^Latitude D630 Dell OptiPlex GX1 PowerEdge 1850 ^AD77 dfi ad77 DFI Elitegroup A928 GeForce6100SM-M K7VTA3 EPoX EP-8K5A2 EP-8NPA7I EP-9NPA7I EP-8RDA3+ epox ep-bx3 EP-BX3 Foxconn 6150K8MD-8EKRSH ^XY680 Fujitsu Amilo Xi 3650 ^6IEM GIGABYTE GA-6IEM GA-7ZM ^8IP775/-G$ GA-8IP775 GA-8IRML GA-8PE667 Ultra 2 ^GA-8SIMLFS20$ GA-8SIMLFS 2.0 ^GA-8SIMLH$ GA-8SIMLH GA-K8N51GMF GA-K8N51GMF-9 GA-K8NS GA-K8N-SLI HP e-Vectra P2706T hp dl145_g3 ProLiant DL145 G3 dl165_g6 ProLiant DL165 G6 Puffer2-UL8E Vectra VL400 ^VL420$ Vectra VL420 SFF xw9400 ibase mb899 MB899 IBM x3455 D201GLY ^D945GCNL$ D945GCNL ^SE440BX-2$ SE440BX-2 iwill dk8_htx IWILL DK8-HTX kontron 986lcd-m Kontron 986LCD-M ^ThinkPad R400 IBM/Lenovo ^ThinkPad T400 ^ThinkPad T500 ^ThinkPad T530 ^ThinkPad T60 ThinkPad T60(s) ^ThinkPad W500 ^ThinkPad X200 ^ThinkPad X201 lenovo x220 ThinkPad X220 ^ThinkPad X230 ^ThinkPad X60 ThinkPad X60(s) ^Taurinus X200 Libiquity Mitac 6513WU ^MSC Vertriebs GmbH$ MSC Q7-TCTC ^MS-6163 (i440BX)$ MSI MS-6163 (MS-6163 Pro) MS-6391 (845 Pro4) ^MS-6561 MS-6561 (745 Ultra) MS-6577 (Xenon) MS-6590 (KT4 Ultra) ^MS-7094$ MS-7094 (K8T Neo2-F V2.0) MS-6712 (KT4V) msi ms6787 MS-6787 (P4MAM-V/P4MAM-L) MS-6788-040 (848P NeoV) MS-7005 (651M-L) MS-7025 (K8N Neo2 Platinum) MS-7030 (K8N Neo Platinum) MS-7046 MS-7061 (KM4M-V/KM4AM-V) k8n-neo3 MS-7135 (K8N Neo3) MS-7207 (K8NGM2-L) MS-7250 (K9N SLI) Nokia IP530 ^EasyNote LM85$ Packard Bell EasyNote LM85 RV11$ Roda Lizard RV11 Samsung Polaris 32 shuttle ak31 Shuttle AK31 AK38N Soyo SY-7VCA ^Sun Ultra 40 M2 Sun Tekram P6Pro-A5 Termtek TK-3370 (Rev:2.5B) TriGem Anaheim-3 Tyan S2498 (Tomcat K7M) VIA EPIA EK EPIA M/MII/... EPIA-N/NL Mutara V08 [NV2] RIVA 128 RIVA TNT RIVA TNT2/TNT2 Pro RIVA TNT2 Ultra Vanta/Vanta LT Aladdin TNT2 GeForce 256 GeForce DDR Quadro GeForce2 MX GeForce2 GO Quadro2 MXR GeForce2 GTS/Pro GeForce2 GTS GeForce2 Ultra Quadro2 Pro GeForce 3 nFX GeForce 3 nFX Ultra Quadro 3 DDC Dr. Kaiser PC-Waechter (Actel FPGA) 1M 500k 250k 125k 62.5k 12M 3M 2.18M 1.5M 750k 375k 230400 250000 2000000 2.6M VT6421A internal dummy nic3com nicrealtek gfxnvidia drkaiser satasii atavia it8212 serprog buspirate_spi dediprog developerbox rayer_spi pony_spi nicintel nicintel_spi nicintel_eeprom ogp_spi satamv linux_mtd Device files /dev/mtd*
linux_spi Device files /dev/spidev*.*
pickit2_spi ch341a_spi digilent_spi stlinkv3_spi %s: Mapping %s, 0x%zx bytes at 0x%0*lx
%s: Unmapping 0x%zx bytes at %p
%s: addr=0x%lx, len=0x%zx, writing data (hex): %s: addr=0x%lx, returning 0xff
%s: addr=0x%lx, returning 0xffff
%s: addr=0x%lx, returning 0xffffffff
ERROR: FDC37B787: Wrong ID 0x%02X.
ERROR: GPIO50 mode 0x%02X unexpected.
Warning: Flash interface in use by GPIO!
ERROR: IT8703F Super I/O not found.
ERROR: Failed to read IT8703F Super I/O GPIO Base.
Laptop detection overridden by P2 board enable.
Reading the USB serialno failed (%s)!
%s: %s after %d tries (access=0x%02x, status=0x%02x)
ROM device with %s kB attached.
%s: Tried to cleanup an invalid PCI context!
Please report a bug at flashrom@flashrom.org
ERROR: PIIX4 GPO%d not programmed for output.
ERROR: Intel PIIX4 PM not found.
ERROR: Intel PIIX4 ISA bridge not found.
Expected south bridge not found
ERROR: SMSC Super I/O not found.
ERROR: Super I/O runtime interface not available.
ERROR: Intel 82801AA ISA bridge not found.
ERROR: AMD SMBus Controller (0x4372) not found.
%s: Tried to undo PCI writes without a valid PCI %s!
Please report a bug at flashrom@flashrom.org
Restoring PCI config space for %02x:%02x:%01x reg 0x%02x
ERROR: NVIDIA MCP61 SMBus not found.
Can't handle raw bitbang mode version %c!
Bus Pirate shutdown completed.
%s: addr=0x%lx, len=0x%zx, returning array of 0xff
Refusing blacklisted SPI command 0x%02x
Ignoring ignorelisted SPI command 0x%02x
Forbidden opcode (0x%02x) attempted during AAI sequence!
WRSR attempted, but WEL is 0!
Max BYTE PROGRAM size exceeded!
Initial AAI WORD PROGRAM size too short!
Initial AAI WORD PROGRAM size too long!
Continuation AAI WORD PROGRAM size too short!
Continuation AAI WORD PROGRAM size too long!
SECTOR ERASE 0x20 outsize invalid!
SECTOR ERASE 0x20 insize invalid!
Unaligned SECTOR ERASE 0x20: 0x%x
BLOCK ERASE 0x52 outsize invalid!
BLOCK ERASE 0x52 insize invalid!
Unaligned BLOCK ERASE 0x52: 0x%x
BLOCK ERASE 0xd8 outsize invalid!
BLOCK ERASE 0xd8 insize invalid!
Unaligned BLOCK ERASE 0xd8: 0x%x
CHIP ERASE 0x60 outsize invalid!
CHIP ERASE 0x60 insize invalid!
CHIP ERASE 0xc7 outsize invalid!
CHIP ERASE 0xc7 insize invalid!
Wrapping the start address around the SFDP table boundary (using 0x%x instead of 0x%x).
Crossing the SFDP table boundary in a single continuous chunk produces undefined results after that point.
Invalid command sent to flash chip!
Bus Pirate communication error!
Protocol error while lowering CS#!
Protocol error while reading/writing SPI!
Protocol error while raising CS#!
Protocol error while sending SPI write/read!
No serial device given. Use flashrom -p buspirate_spi:dev=/dev/ttyUSB0
Invalid pullups state, not using them.
(unknown version number format) Bus Pirate firmware 2.3 and older does not support binary SPI access.
Please upgrade to the latest firmware (at least 2.4).
Bus Pirate firmware 5.4 and older does not support fast SPI access.
Reading/writing a flash chip may take hours.
It is recommended to upgrade to firmware 5.5 or newer.
Bus Pirate firmware 6.1 and older does not support SPI speeds above 2 MHz. Limiting speed to 2 MHz.
It is recommended to upgrade to firmware 6.2 or newer.
Bus Pirate v3 or newer detected. Set serial speed to 2M baud.
Bus Pirate firmware 5.4 and older does not support custom serial speeds.Using default speed of 115200 baud.
Increased serial speeds may not work on older (<3.0) Bus Pirates. Continue at your own risk.
Unable to configure system baud rate to specified value. Can't handle raw SPI mode version %c!
Protocol error while setting power/CS/AUX(/Pull-up resistors)!
Protocol error while setting SPI speed!
Pull-ups enabled, so using HiZ pin output! (Open-Drain mode)
Protocol error while setting SPI config!
Invalid serial speed %s, using default.
Invalid SPI speed, using default.
Polling read events failed: %i %s!
%s: failed to submit OUT transfer: %s
%s: failed to submit IN transfer: %s
Could not %sable output pins.
%s: handle already set! Please report a bug at flashrom@flashrom.org
Couldn't open device %04x:%04x.
Detaching kernel drivers is not supported. Further accesses may fail.
Failed to detach kernel driver: '%s'. Further accesses will probably fail.
Failed to claim interface 0: '%s'
Failed to get device from device handle.
Failed to get device descriptor: '%s'
Device revision is %d.%01d.%01d
Failed to alloc libusb OUT transfer
Failed to alloc libusb IN transfer %d
Could not configure stream interface.
Command Set LED 0x%x failed (%s)!
Unknown voltage %i mV! Aborting.
Setting SPI voltage to %u.%03u V
Command Set SPI Voltage 0x%x failed!
Could not release USB interface!
Invalid writecnt=%i, aborting.
Invalid readcnt=%i, aborting.
Send SPI failed, expected %i, got %i %s!
Receive SPI failed, expected %i, got %i %s!
Failed to read dediprog id, error %d!
Failed to read GPIO pins (%s)
%s: Unsupported transfer length of %u blocks! Please report a bug at flashrom@flashrom.org
Can't handle 4-byte address with dediprog.
Slow read for partial block from 0x%x, length 0x%x
%s: Unaligned start=%i, len=%i! Please report a bug at flashrom@flashrom.org
Command Read SPI Bulk failed, %i %s!
Allocating libusb transfer %i failed: %s!
Submitting SPI bulk read %i failed: %s!
Failed to issue a command: '%s'
Short write issuing a command
Failed to get a response: '%s'
Short read getting a response
Response indicates incorrect length.
%s: failed to write data: '%s'
%s: failed to read data: '%s'
%s: response missing a write count
%s: wrote only %d bytes instead of %d
%s: response missing a read count
%s: read only %d bytes instead of %d
%s: Chunk sizes other than 256 bytes are unsupported, chunksize=%u!
Please report a bug at flashrom@flashrom.org
Command Write SPI Bulk failed, %s!
SPI bulk write failed, expected %i, got %s!
Page sizes other than 256 bytes are unsupported as we don't know how dediprog
handles them.
Slow write for partial block from 0x%x, length 0x%x
Incomplete/failed Command Receive Device String!
Device not a SF100, SF200, or SF600!
Unexpected firmware version string '%s'
Unexpected firmware version %d.%d.%d!
Internal error: Unable to determine protocol version.
%s: couldn't initialize libusb!
%s: couldn't open device %04x:%04x.
%s: failed to claim interface 0: '%s'
%s: unknown board '%s' not attempting a reset. Override with '-p digilent_spi=reset=1'.
SPI speed set to %d instead of %d
Error: Invalid spispeed value: '%s'.
Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY).
Error: opening file "%s" failed: %s
Error: file %s could not be written completely.
Error: flushing file "%s" failed: %s
Error: getting metadata of file "%s" failed: %s
Error: fsyncing file "%s" failed: %s
Error: closing file "%s" failed: %s
Enabling support for %s flash.
Support for all flash bus types disabled.
invalid spi_write_256_chunksize
Invalid SPI command blacklist length
Invalid char "%c" in SPI command blacklist
Invalid SPI command ignorelist length
Invalid char "%c" in SPI command ignorelist
Not emulating any flash chip.
Emulating ST M25P10.RES SPI flash chip (RES, page write)
Emulating SST SST25VF040.REMS SPI flash chip (REMS, byte write)
Emulating SST SST25VF032B SPI flash chip (RDID, AAI write)
Emulating Macronix MX25L6436 SPI flash chip (RDID, SFDP)
Emulating Winbond W25Q128FV SPI flash chip (RDID)
Invalid chip specified for emulation: %s
Error: initial status register specified, but the value could not be converted.
Initial status register is set to 0x%02x.
Filling fake flash chip with 0xff, size %i
Found persistent image %s, %jd B Error: Image size (%jd B) doesn't match the flash chip's size (%lu B)!
Error: Failed to read complete file. Got %ld bytes, wanted %ld!
MCP LPC bridge at unexpected function number %d
MCP SMBus controller could not be found
Unexpected device class %04x for SMBus controller
ERROR: no NVIDIA LPC/SMBus controller found.
ERROR: NVIDIA MCP55 LPC bridge not found.
Getting the USB device list failed (%s)!
Reading the USB device descriptor failed (%s)!
Found USB device %04x:%04x at address %d-%d.
Opening the USB device at address %d-%d failed (%s)!
Could not find a Dediprog programmer on USB.
Could not set USB device configuration: %i %s
Could not claim USB device interface %i: %i %s
Error: Could not parse dediprog 'id'.
Expected a string like SF012345 or DP012345.
Error: id %s is out of range!
Will search for dediprog id %s.
Error: Cannot use 'id' and 'device'.
Error: Could not convert 'device'.
Error: Value for 'device' is out of range.
Error: Garbage following 'device' value.
Error: Could not convert 'target'.
Error: Value for 'target' is out of range.
Error: Garbage following 'target' value.
FLASH_TYPE_APPLICATION_FLASH_1 FLASH_TYPE_APPLICATION_FLASH_2 Command Set Voltage failed (%s)!
set_target_flash failed (%s)!
Skipping to set SPI speed because firmware is too old.
Command Set SPI Speed 0x%x failed!
Failed to disable standalone mode: %s
Looking for serial number commencing %s
Could not find a Developerbox programmer on USB.
Unknown PCI header type 0x%02x, BAR type cannot be determined reliably.
MEM BAR access requested, but device has MEM space accesses disabled.
I/O BAR access requested, but device has I/O space accesses disabled.
BAR type unknown, please report a bug at flashrom@flashrom.org
%s: Tried to allocate a new PCI context, but there is still an old one!
Please report a bug at flashrom@flashrom.org
===
This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output
to flashrom@flashrom.org if it works for you. Please add the name of your
PCI device to the subject. Thank you for your help!
===
Error: No supported PCI device found.
Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f'
to explicitly select the card with the given BDF (PCI bus, device, function).
Found "%s %s" (%04x:%04x, BDF %02x:%02x.%x).
Error: Invalid offset specified: "%s".
Mapping addresses to base %p.
Controller thinks there is no ROM attached.
Dr. Kaiser PC-Waechter flash memory Detected NVIDIA I/O base address: 0x%x.
Board name "%s":"%s" and PCI IDs matched more than one board enable entry. Please report a bug at flashrom@flashrom.org
Odd. Board name "%s":"%s" matches, but second PCI device %04x:%04x doesn't.
Odd. Board name "%s":"%s" matches, but first PCI device %04x:%04x doesn't.
Warning: Can't autodetect %s %s, DMI info unavailable.
Please supply the board vendor and model name with the -p internal:mainboard=: option.
Found candidate at: %08lx-%08lx
Header bytes of %d are incorrect.
Found coreboot table at 0x%08lx.
Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).
Found southbridge %04x:%04x at %02x:%02x:%01x
BIOS Interface Lock-Down: %sabled, BIOS Prefetch Enable: %sabled, invalid prefetching/caching settings, prefetching %sabled, caching %sabled, Warning: BIOS region SMM protection is enabled!
Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.
New value is 0x%02x.
Error: Invalid ILB_BASE_ADDRESS
Error: fwh_idsel= specified, but (yet) unsupported on this chipset.
Error: fwh_idsel= specified, but value could not be converted.
Error: fwh_idsel= specified, but value had unused bits set.
Setting IDSEL from 0x%012lx to 0x%012lx for top 16 MB.
Error: fwh_idsel= specified, but no value given.
0x%08x/0x%08x FWH IDSEL: 0x%x
0x%08x/0x%08x FWH decode %sabled
Maximum FWH chip size: 0x%x bytes
FWH IDSEL handling is not implemented on this chipset.
Root Complex Register Block address = 0x%x
82580 Quad Gigabit Ethernet Controller (Copper) 82580 Quad Gigabit Ethernet Controller (Fiber) 82580 Quad Gigabit Ethernet Controller (Backplane) 82580 Quad Gigabit Ethernet Controller (Ext. PHY) 82580 Dual Gigabit Ethernet Controller (Copper) Unprogrammed 82580 Quad/Dual Gigabit Ethernet Controller I210 Gigabit Network Connection Unprogrammed I211 Gigabit Network Connection Unprogrammed I210 Gigabit Network Connection I210 Gigabit Network Connection SERDES Fiber I210 Gigabit Network Connection SERDES Backplane I210 Gigabit Network Connection SGMII I211 Gigabit Network Connection 82571EB Gigabit Ethernet Controller 82541GI Gigabit Ethernet Controller 82541PI Gigabit Ethernet Controller 82572EI Gigabit Ethernet Controller 82574L Gigabit Ethernet Controller 82599 10 Gigabit Unprogrammed Network Controller 82599 10 Gigabit KX4 Dual Port Network Controller 82599 10 Gigabit Dual Port Backplane Controller 82599 10 Gigabit CX4 Dual Port Network Controller 82599 10-Gigabit SFI/SFP+ Network Controller 82599 10 Gigabit XAUI/BX4 Dual Port Network Controller 82599 10 Gigabit KR Network Controller 82599 10 Gigabit TN Network Controller 82599 10 Gigabit Dual Port Network Controller with FCoE 82599 10 Gigabit Dual Port Backplane Controller with FCoE 82599 10 Gigabit SFI Network Controller 8255xER/82551IT Fast Ethernet Controller 82557/8/9/0/1 Ethernet Pro 100 CP2102N USB to UART Bridge Controller PCI0680 Ultra ATA-133 Host Ctrl SiI 3112 [SATALink/SATARaid] SATA Ctrl SiI 3114 [SATALink/SATARaid] SATA Ctrl SiI 3512 [SATALink/SATARaid] SATA Ctrl 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4 3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO) 3C90xB: PCI 10BASE-T/10BASE2 (TPC) 3C905C: EtherLink 10/100 PCI (TX) 3C980C: EtherLink Server 10/100 PCI (TX) MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum)) RIVA TNT2 Model 64/Model 64 Pro Dummy device, does nothing and logs all accesses
All programmer devices speaking the serprog protocol
Dangerous Prototypes Bus Pirate
RayeR parallel port programmer
Programmers compatible with SI-Prog, serbang or AJAWe
Nxa|RQ\R\R\RlRlRlRgQgQLR|RgQLRLRLRLR4R N N N @ @ @ @ N SFDP H k; R 6 'O dummy_spi_send_command dummy_chip_readn dummy_chip_readl dummy_chip_readw dummy_chip_readb dummy_chip_writen dummy_chip_writel dummy_chip_writew dummy_chip_writeb dummy_unmap dummy_map dummy_init dummy_shutdown default_reset digilent_spi_init spi_tx_end digilent_spi_send_command dediprog_spi_send_command
dediprog_spi_bulk_write
dediprog_spi_bulk_read prepare_rw_cmd config_stream ch341a_spi_init ch341a_spi_spi_send_command enable_pins cb_in cb_out buspirate_sendrecv atavia_chip_readb atavia_chip_writeb atavia_ready undo_pci_write pci_init_common pcidev_shutdown HSFS: FDONE %s=%d, FCERR AEL BERASE SCIP PRR34_LOCKDN WRSDIS FDOPSS FDV FLOCKDN %s=%d
HSFC: FGO HSFC WET FCYCLE FDBC SME SSFS: SSFC: SCGO ACS SPOP COP SCF s with a combined with a density of %d kB.
HSFC used for block erasing: %s failed
RDSR failed!
Executing... done
cmd=%02x mode=%02x
data=0x%02x addr=0x%02x data=0x %s: returning data = Unsupported chip size 0x%x
Timeout reading heading byte
Timeout writing heading word
Timeout reading tail byte
Timeout writing Shadow RAM
Disabling byte merging
wbsio_spibase = 0x%x
OK
IMC SIO is at 0x%x.
IMC MBOX is at 0x%x.
IMC MBOX: Timeout!
Resuming IMC failed)
IMC resumed.
Elan SC520 MMCR VIA SPI MMIO registers 0x00: 0x%04x (SPIS)
0x02: 0x%04x (SPIC)
0x04: 0x%08x (SPIA)
0x%02x: 0x%08x (SPID%d)
0x%02x: 0x%08x (SPID%d+4)
0x50: 0x%08x (BBAR)
0x54: 0x%04x (PREOP)
0x56: 0x%04x (OPTYPE)
0x58: 0x%08x (OPMENU)
0x5c: 0x%08x (OPMENU+4)
0x%02x: 0x%08x (PBR%d)
Strapped to LPC.
SPI.
MMIO not enabled!
VIA VX MMIO register SPI Bus0 disabled!
SPI Bus1 is enabled too.
reset
Filling FIFO: [%02x] Skipping: Reading FIFO: Filling buffer: Reading buffer: IT8212F flash %s/%s Cannot open %s
Error reading %s
Error reading %s: %s
Cannot seek to 0x%06x: %s
Failed to flush buffer: %s
%s: ioctl: %s
%s does not exist
/sys/class/mtd %s/mtd%d/ type nor /dev %s/mtd%d Cannot stat "%s": %s
flags MTD size is not a power of 2
erasesize numeraseregions r+ Opened %s successfully
ATI boardenable boardmismatch force_I_want_a_brick this_is_not_a_laptop Missing argument for laptop.
mainboard low megabyte No coreboot table found.
high tables Continuing anyway.
Using Internal DMI decoder.
DMI _DMI_ DMI Table Unable to access DMI Table
Not Specified No DMI table found.
Laptop detected via DMI.
DMI string %s: "%s"
Found chipset "%s %s" with PCI ID %04x:%04x Enabling flash write... OK.
PROBLEMS, continuing anyway
FATAL ERROR!
dualbiosindex DualBIOS: Selected chip: %d
Serial flash pin %i
Serial flash port 0x%04x
it87spiport Aborting to be safe.
%s: invalid clock: %s kHz
Using device %s
%s: failed to open %s: %s
Using %ukHz clock
Cannot open %s: %s.
Cannot read %s: %s.
%s: max_kernel_buf_size: %zu
Flash bus type is LPC
Flash bus type is SPI
Odd. SMBus device not found.
MCP SPI BAR is at 0x%08x
MCP SPI is not used.
NVIDIA MCP6x SPI Descr. 0x%02x: 0x%08x (PBR%u)
ich_spi_mode hwseq user selected hwseq
swseq user selected swseq
auto user selected auto
0x04: 0x%04x (HSFS)
0x06: 0x%04x (HSFC)
0x08: 0x%08x (FADDR)
0x0c: 0x%08x (DLOCK)
DLOCK: SBMWAG_LOCKDN SBMRAG_LOCKDN %s=%d,
PR0_LOCKDN PR1_LOCKDN PR2_LOCKDN PR3_LOCKDN PR4_LOCKDN SSEQ_LOCKDN 0x50: 0x%08x (FRAP)
BMWAG 0x%02x, BMRAG 0x%02x, BRWA 0x%02x, BRRA 0x%02x
0x%02X: 0x%08x read-write PR%u is 0x%08x already.
, trying to set it to 0x%08x resulted in 0x%08x.
0x%zx: 0x%02x (SSFS)
Clearing SSFS.FCERR
0x%zx: 0x%06x (SSFC)
0x%zx: 0x%04x (PREOP)
0x%zx: 0x%04x (OPTYPE)
0x%zx: 0x%08x (OPMENU)
0x%zx: 0x%08x (OPMENU+4)
0x%x: 0x%08x (BBAR)
0x%x: 0x%08x (VSCC)
0x%x: 0x%08x (LVSCC)
LVSCC: 0x%x: 0x%08x (UVSCC)
UVSCC: 0x%x: 0x%08x (FPB)
=== Content Section ===
FLVALSIG 0x%08x
FLMAP0 0x%08x
FLMAP1 0x%08x
FLMAP2 0x%08x
--- Details ---
Component 2 is not used.
Fast Read is %ssupported.
No forbidden opcodes.
=== Region Section ===
FLREG%zd 0x%08x
Region %d (%-7s) is unused.
0x%08x - 0x%08x
=== Master Section ===
FLMSTR%zd 0x%08x
EC %-4s %c%c TXE %c%c checking for opcode 0x%02x
%s: null OPCODES pointer!
=== Component Section ===
FLCOMP 0x%08x
FLILL 0x%08x
FLILL1 0x%08x
DE IE ME BIOS FD Reg15 Reg14 Reg13 OpROM 10GbE IE DE2 BMC Reg7 BIOS2 DE Pltf GbE %s: unsupported chipset
Transaction error!
timeout, REG_SSFS=0x%08x
Running OPCODE 0x%02x failed at address 0x%06x (payload length was %d).
The data was:
%3d: 0x%02x
Opcode %x not found.
Error: SCIP never cleared!
Intel NIC flash Intel NIC control/status reg write read GPIO SPI_DO SPI_HOLD 66 MHz SPI base address is at 0x%x
SB600 SPI registers SB6xx detected.
SB7xx/SP5100 detected.
Hudson-2/3/4 detected.
Bolton detected.
Yangtze detected.
Promontory detected.
SpiRomEnable=%i , RouteTpm2Sp=%i , PrefetchEnSPIFromIMC=%i , SpiOpEnInLpcMode=%i , PrefetchEnSPIFromHost=%i
(0x%08x) SpiArbEnable=%i , IllegalAccess=%i , SpiBridgeDisable=%i , SpiBusy=%i Using SPI_CS%d
GPIO11 used for %s
SPI_DI GPIO12 used for %s
Not enabling SPI GPIO31 used for %s
SpiReadMode=%s (%i)
Normal (up to 66 MHz) Enabling Spi100 failed.
Enabling Spi100 succeeded.
NormSpeedNew is %s
FastSpeedNew is %s
AltSpeedNew is %s
TpmSpeedNew is %s
NormSpeed is %s
Setting SPI clock failed.
amd_imc_force yes amd_imc_force enabled.
IMC is not active.
No IMC found.
Shutting down IMC failed.
: LPC : PCI : FWH : SPI UseSpi100 is %sabled
Fast Reads are %sabled
Disabling them temporarily.
GPIO47 used for %s
SPI_CLK GPIO32 used for %s
SPI_CS Flash Descriptor Management Engine Gigabit Ethernet Platform Data Device Expansion EC/BMC locked read-only write-only 20 MHz 33 MHz 50 MHz 48 MHz 30 MHz 40 MHz 25 MHz 14 MHz / 17 MHz Platf. DevExp Other Unknown Low Profile Desktop Mini Tower Portable Laptop Hand Held Sub Notebook Main Server Chassis Rack Mount Chassis Sealed-case PC Multi-system SB400 AMD SB600 SB7x0/SB8x0/SB9x0 SC1100 CS5536 Elan SC520 AMD-768 AMD-8111 FCH FP4 SiS 501/5101/5501 85C496+497 540 620 635 640 645 645DX 648 651 655 661 730 733 735 740 741 745 746 748 755 5511 5571 5591/5592 5596 5597/5598/5581/5120 CS5530(A) ALi M1533 nForce4/MCP4 CK804 NForce2 NForce3 MCP51 MCP55 MCP61 MCP65 MCP67 MCP78S MCP73 MCP79 MCP89 VT82C585VPX VT82C595 VT82C597 VT8601/VT8601A VT82C69x VT8601T VT82C586A/B VT82C596 VT82C686A/B VT8233 VT8233A VT8235 VT8237(R) VT8251 VT8237A VT8237S VT8231 CX700 VX800/VX820 VX855/VX875 VX900 Broadcom OSB4 HT-1000 RDC R8610/R3210 S12x0 Bay Trail MPIIX Z68 UM67 HM65 H67 HM67 Q65 QS67 Q67 QM67 B65 C202 C204 C206 H61 C60x/X79 Z77 Z75 Q77 Q75 B75 H77 C216 QM77 QS77 HM77 UM77 HM76 HM75 HM70 NM70 Avoton/Rangeley Braswell DH89xxCC (Cave Creek) Coleto Creek ICH0 ICH2 ICH2-M C-ICH ICH3-S ICH3-M ICH4/ICH4-L ICH4-M ICH5/ICH5R 6300ESB ICH6/ICH6R ICH6-M ICH6W/ICH6RW 631xESB/632xESB/3100 ICH7DH ICH7/ICH7R ICH7M NM10 ICH7MDH ICH8/ICH8R ICH8M-E ICH8DH ICH8DO ICH8M ICH9 Eng. Sample ICH9DH ICH9DO ICH9R ICH9M-E ICH9 ICH9M ICH10R Eng. Sample ICH10DO ICH10R ICH10 ICH10D ICH10 Eng. Sample 3400 Desktop 3400 Mobile PM55 H55 QM57 H57 HM55 Q57 HM57 3400 Mobile SFF B55 QS57 3400 3420 3450 EP80579 PIIX3 PIIX4/4E/4M 440MX SCH Poulsbo Atom E6xx(T) (Tunnel Creek) Lynx Point Mobile Eng. Sample Z87 Z85 HM86 H87 HM87 Q85 Q87 QM87 B85 C222 C224 C226 H81 9 Series 9 Series Engineering Sample Z97 H97 C610/X99 (Wellsburg) Lynx Point LP Eng. Sample Lynx Point LP Premium Lynx Point LP Mainstream Lynx Point LP Value Haswell U Sample Broadwell U Sample Broadwell U Premium Broadwell U Base Broadwell Y Sample Broadwell Y Premium Broadwell Y Base Broadwell H Skylake / Kaby Lake Sample Skylake U Base Skylake Y Premium Skylake U Premium Kaby Lake Y w/ iHDCP2.2 Prem. Kaby Lake U w/ iHDCP2.2 Prem. Kaby Lake U w/ iHDCP2.2 Base Kabe Lake w/ iHDCP2.2 Sample Kaby Lake U Base Kaby Lake Y Premium Kaby Lake U Premium Cannon Lake U Premium Sunrise Point Desktop Sample Sunrise Point Unknown Sample H110 H170 Z170 Q170 Q150 B150 C236 C232 Sunrise Point Server Sample QM170 HM170 CM236 QMS180 HM175 QM175 CM238 QMU185 C621 Series Chipset (QS/PRQ) C622 Series Chipset (QS/PRQ) C624 Series Chipset (QS/PRQ) C625 Series Chipset (QS/PRQ) C626 Series Chipset (QS/PRQ) C627 Series Chipset (QS/PRQ) C628 Series Chipset (QS/PRQ) C624 Series Chipset Supersku C627 Series Chipset Supersku C621 Series Chipset Supersku C628 Series Chipset Supersku C620 Series Chipset Supersku H270 Z270 Q270 Q250 B250 Z370 X299 Apollo Lake H310 H370 Z390 Q370 B360 C246 C242 QM370 HM370 CM246 Ice Lake U Premium Normal (up to 33 MHz) Reserved Dual IO (1-1-2) Quad IO (1-1-4) Dual IO (1-2-2) Quad IO (1-4-4) Fast Read 22 MHz 16.5 MHz 100 MHz 800 kHz Transaction error between offset 0x%08x and 0x%08x (= 0x%08x + %d)!
Timeout error between offset 0x%08x and 0x%08x (= 0x%08x + %d)!
Hardware sequencing reports %d attached SPI flash chip There is only one partition containing the whole address space (0x%06x - 0x%06x).
There are %d erase blocks with %d B each.
The flash address space (0x%06x - 0x%06x) is divided at address 0x%06x in two partitions.
The first partition ranges from 0x%06x to 0x%06x.
In that range are %d erase blocks with %d B each.
The second partition ranges from 0x%06x to 0x%06x.
Erase block size for address 0x%06x is %d B, but requested erase block size is %d B. Not erasing anything.
Erase address 0x%06x is not aligned to the erase block boundary (any multiple of %d). Not erasing anything.
Request to erase some inaccessible memory address(es) (addr=0x%x, len=%d). Not erasing anything.
Erasing %d bytes starting at 0x%06x.
Request to read from an inaccessible memory address (addr=0x%x, len=%d).
Reading %d bytes starting at 0x%06x.
Request to write to an inaccessible memory address (addr=0x%x, len=%d).
Writing %d bytes starting at 0x%06x.
%s called with unsupported readcnt %i.
%s called with unsupported writecnt %i.
AMD SPI FIFO pointer corruption! Pointer is %d, wanted %d
Something else is accessing the flash chip and causes random corruption.
Please stop all applications and drivers and IPMI which access the flash chip.
AMD SPI FIFO pointer is %d, wanted %d
W83627 not found at 0x%x, id=0x%02x want=0xa0.
W83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)
W83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)
%s: unsupported command type wr=%d rd=%d
Warning: Failed to enable flash write on "%s"
Changed ROM decode range to 0x%02x successfully.
Set ROM enable bit successfully.
Setting register 0x6d to 0x%02x on %s failed.
ERROR: SMBus device not found. Aborting.
%s: Winbond saved on 4 register bits so max chip size is 1024 kB!
Can not unlock existing protection in register 0x%02x.
Unlocking protection in register 0x%02x... Could not unlock protection in register 0x%02x (new value: 0x%x).
Could not unlock protection in register 0x%02x (new value: 0x%08x).
%d locks could not be disabled, disabling writes (reads may also fail).
Setting register 0x%02x to 0x%02x on %s failed.
AMD Elan SC520 detected, but no BOOTCS. Assuming flash at 4G.
0x6c: 0x%04x (CLOCK/DEBUG)
Warning: SPI Configuration Lockdown activated.
%s: Unsupported chipset %x:%x!
Could not find South-North Module Interface Control device!
%s, cmd=0x%02x, writecnt=%d, readcnt=%d
Unexpected change in AMD SPI read/write count!
Error occurred when reading %s
Cannot read 0x%06x bytes at 0x%06x: %s
Cannot write 0x%06x bytes at 0x%06x
%s: device does not support erasing. Please file a bug report at flashrom@flashrom.org
%s: mtd_numeraseregions must be 0
Invalid device number %s. Use flashrom -p linux_mtd:dev=N where N is a valid MTD
device number.
MTD device %d type is not "nor"
MTD erase size is not a power of 2
Non-uniform eraseblock size is unsupported.
%s: device_name: "%s", is_writeable: %d, numeraseregions: %lu, total_size: %lu, erasesize: %lu
Cannot open file stream for %s
Missing argument for boardenable.
Unknown argument for boardenable: %s
Missing argument for boardmismatch.
Unknown argument for boardmismatch: %s
Unknown argument for laptop: %s
-p internal:mainboard: vendor="%s", model="%s"
Missing argument for mainboard.
Failed getting access to coreboot low tables.
Failed getting access to coreboot high tables.
coreboot table found at 0x%lx.
coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d
Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not
match the current coreboot IDs of the mainboard (%s:%s).
Warning: Could not register DMI shutdown function - continuing without DMI info.
DMI table is broken (bogus header)!
DMI string chassis-type: "%s"
DMI table is broken (chassis_type out of bounds)!
DMI table is broken (offset out of bounds)!
DMI table is broken (string portion out of bounds)!
DMI chassis-type is not specific enough.
W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.
Found ITE Super I/O, ID 0x%04hx on port 0x%x
Active config mode, unknown reg 0x20 ID: %02x.
Found Winbond Super I/O, id 0x%02hx
Winbond Super I/O probe weirdness: Port mismatch for ID 0x%02x at port 0x%04x
W836xx hardware monitor disabled or does not exist.
W836xx Hardware Monitor at port %04x
W836xx hardware monitor busy, ignoring it.
W836xx hardware monitor vendor ID weirdness: expected 0x5ca3, got %04x
Probably not a Winbond Super I/O
W83 series hardware monitor device ID weirdness: expected 0x%02x, got 0x%02x
Found ITE EC, ID 0x%04hx, Rev 0x%02x on port 0x%x.
Warning: unexpected second chipset match: "%s %s"
ignoring, please report lspci and board URL to flashrom@flashrom.org
with 'CHIPSET: your board name' in the subject line.
ERROR: This chipset is not supported yet.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom *and* were (not) able to successfully update your firmware with it,
then please email a report to flashrom@flashrom.org including a verbose (-V) log.
Thank you!
Skipping chipset enable: No supported buses enabled.
OK - searching further chips.
WARNING: No chipset found. Flash detection will most likely fail.
Enabling IT8705F flash ROM interface write.
IT8705F with very unusual settings.
Please send the output of "flashrom -V -p internal" to flashrom@flashrom.org
with "IT8705: your board name: flashrom -V" as the subject to help us finish
support for your Super I/O. Thanks.
Inconsistent IT8705F decode size!
IT8705F flash data pins disabled!
IT8705F flash address pins 0-7 disabled!
IT8705F flash address pins 8-15 disabled!
IT8705F flash write enable pin disabled!
IT8705F flash chip select pin disabled!
IT8705F flash read strobe pin disabled!
IT8705F flash address pins 16-17 disabled!
Maximum IT8705F parallel flash decode size is %u.
Not enabling IT8705F flash write.
No IT8705F flash segment enabled.
DualBIOS: Invalid chip index requested - choose 0 or 1.
DualBIOS: Previous chip index: %d
DualBIOS: Chip selection failed.
No IT87* serial flash segment enabled.
Serial flash segment 0x%08x-0x%08x %sabled
Error: it87spiport specified, but no valid port specified.
Port must be a multiple of 0x8 and lie between 0x100 and 0xff8.
Forcing serial flash port 0x%04x
Overriding chipset SPI with IT87 SPI.
Super I/O ID 0x%04hx is not on the list of flash-capable controllers.
No suitable board enable found for vendor="%s", model="%s".
No board enable found matching coreboot IDs vendor="%s", model="%s".
Warning: The mainboard-specific code for %s %s has not been tested,
and thus will not be executed by default. Depending on your hardware,
erasing, writing or even probing can fail without running this code.
Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection
"internal programmer") for details.
NOTE: Running an untested board enable procedure.
Please report success/failure to flashrom@flashrom.org.
Enabling full flash access for board "%s %s"... ========================================================================
You seem to be running flashrom on an unknown laptop. Some
internal buses have been disabled for safety reasons.
You may be running flashrom on an unknown laptop. We could not
detect this for sure because your vendor has not set up the SMBIOS
tables correctly. Some internal buses have been disabled for
safety reasons. You can enforce using all buses by adding
-p internal:laptop=this_is_not_a_laptop
to the command line, but please read the following warning if you
are not sure.
Laptops, notebooks and netbooks are difficult to support and we
recommend to use the vendor flashing utility. The embedded controller
(EC) in these machines often interacts badly with flashing.
See the manpage and https://flashrom.org/Laptops for details.
If flash is shared with the EC, erase is guaranteed to brick your laptop
and write may brick your laptop.
Read and probe may irritate your EC and cause fan failure, backlight
failure and sudden poweroff.
You have been warned.
========================================================================
LPC write to serial flash %sabled
Enabling LPC write to serial flash
Using default %ukHz clock. Use 'spispeed' parameter to override.
No SPI device given. Use flashrom -p linux_spi:dev=/dev/spidevX.Y
%s: failed to set speed to %uHz: %s
%s: failed to set SPI mode to 0x%02x: %s
%s: failed to set the number of bits per SPI word to %u: %s
/sys/module/spidev/parameters/bufsiz Cannot read %s: file is empty.
Buffer size %ld from %s seems wrong.
%s: Using value from %s as max buffer size.
%s: Using page size as max buffer size.
ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is %i
Flash bus type is unknown (none)
Please send the log files created by "flashrom -p internal -o logfile" to
flashrom@flashrom.org with "your board name: flashrom -V" as the subject to
help us finish support for your chipset. Thanks.
ERROR: SMBus device not found. Not enabling SPI.
Found SMBus device %04x:%04x at %02x:%02x:%01x
Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.
SPI control is 0x%04x, req=%i, gnt=%i
MCP6X bitbang SPI master init failed!
WARNING: SPI Configuration Lockdown activated.
Missing argument for ich_spi_mode.
Unknown argument for ich_spi_mode: %s
SPI Configuration is locked down.
The Flash Descriptor Override Strap-Pin is set. Restrictions implied by
the Master Section of the flash descriptor are NOT in effect. Please note
that Protected Range (PR) restrictions still apply.
0x%02X: 0x%08x FREG%u: %s region is unused.
FREG%u: %s region (0x%08x-0x%08x) is %s.
FREG%u: %s region (0x%08x-0x%08x) has unknown permissions.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
0x%02X: 0x%08x (%sPR%u is unused)
%sPR%u: Warning: 0x%08x-0x%08x is %s.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
At least some flash regions are read protected. You have to use a flash
layout and include only accessible regions. For write operations, you'll
additionally need the --noverify-all switch. See manpage for more details.
%s: number of regions too high (%d) - failed
NR (Number of Regions): %5zd
FRBA (Flash Region Base Address): 0x%03x
NC (Number of Components): %5d
FCBA (Flash Component Base Address): 0x%03x
ISL (ICH/PCH/SoC Strap Length): %5d
FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x%03x
%s: number of masters too high (%d) - failed
NM (Number of Masters): %5zd
FMBA (Flash Master Base Address): 0x%03x
MSL/PSL (MCH/PROC Strap Length): %5d
FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x
Component 1 density: %s
Component 2 density: %s
Read Clock Frequency: %s
Read ID and Status Clock Freq.: %s
Write and Erase Clock Freq.: %s
Fast Read Clock Frequency: %s
Dual Output Fast Read Support: %sabled
Invalid instruction 0: 0x%02x
Invalid instruction 1: 0x%02x
Invalid instruction 2: 0x%02x
Invalid instruction 3: 0x%02x
Invalid instruction 4: 0x%02x
Invalid instruction 5: 0x%02x
Invalid instruction 6: 0x%02x
Invalid instruction 7: 0x%02x
%s: number of regions too high (%d).
%s: number of masters too high (%d).
FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 RegA RegB RegC RegD RegE RegF
FD IFWI TXE n/a Platf DevExp
Descr. BIOS ME GbE Platf.
BIOS %c%c %c%c %c%c %c%c %c%c
ME %c%c %c%c %c%c %c%c %c%c
GbE %c%c %c%c %c%c %c%c %c%c
Enabling hardware sequencing due to multiple flash chips detected.
Enabling hardware sequencing by default for Apollo Lake.
Hardware sequencing was requested but the flash descriptor is not valid. Aborting.
Could not determine density of flash component %d.
Enabling hardware sequencing by default for 100+ series PCH.
Enabling hardware sequencing because some important opcode is locked.
Reading flash descriptors mapped by the chipset via FDOC/FDOD... %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s
%s: preop=%04x optype=%04x opmenu=%08x%08x
on-the-fly OPCODE (0x%02X) re-programmed, op-pos=%d
OPCODE 0x%02x has unsupported length, will not execute.
Invalid OPCODE 0x%02x, will not execute.
%s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =4
%s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =1
%s: Internal command size error for opcode 0x%02x, got writecnt=%i, want >=4
%s: Internal command size error for opcode 0x%02x, got readcnt=%i, want =0
%s: Addressed region 0x%06x-0x%06x not in allowed range 0x%06x-0x%06x
%s: Internal command size error for opcode 0x%02x, got datalength=%i, want <=%i
timeout, ICH7_REG_SPIS=0x%04x
%s: Two subsequent preopcodes 0x%02x and 0x%02x, ignoring the first.
Chipset %s%sprotected flash from 0x%08x to 0x%08x, unlocking... Disabling %s%sprotection of flash addresses from 0x%08x to 0x%08x failed.
Trying to determine the generation of the SPI interface... SB8xx/SB9xx/Hudson-1 detected.
SB device found but SMBus revision 0x%02x does not match known values.
Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom@flashrom.org
FCH device found but SMBus revision 0x%02x does not match known values.
Please report this to flashrom@flashrom.org and include this log and
the output of lspci -nnvx, thanks!.
%s: Unknown LPC device %x:%x.
Please report this to flashrom@flashrom.org and include this log and
the output of lspci -nnvx, thanks!
Could not determine chipset generation. , AltSpiCSEnable=%i, AbortEnable=%i , SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i , DropOneClkOnRd/SpiClkGate=%i ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.
Setting read mode to "%s" failed.
Setting read mode to "%s" succeeded.
Setting SPI clock to %s (0x%x).
Missing argument for amd_imc_force.
Unknown argument for amd_imc_force: "%s" (not "yes").
Writes have been disabled for safety reasons because the presence of the IMC
was detected and it could interfere with accessing flash memory. Flashrom will
try to disable it temporarily but even then this might not be safe:
when it is re-enabled and after a reboot it expects to find working code
in the flash and it is unpredictable what happens if there is none.
To be safe make sure that there is a working IMC firmware at the right
location in the image you intend to write and do not attempt to erase.
You can enforce write support with the amd_imc_force programmer option.
Shutting down IMC successful.
ROM strap override is %sactive Continuing with write support because the user forced us to!
No SMBus device with ID %04X:%04X found.
Lynx Point Desktop Eng. Sample linux_spi_send_command linux_spi_init get_mtd_info linux_mtd_erase wbsio_spi_send_command wbsio_check_for_spi spi100_spi_send_command sb600_spi_send_command spi_write_enable it8716f_spi_send_command read_ich_descriptors_via_fdo prettyprint_ich_descriptor_region prettyprint_ich_descriptor_master
find_preop ich_spi_send_multicommand run_opcode ich_spi_send_command program_opcodes find_opcode R determine_generation enable_flash_vt_vx Enabling eeprom access failed.
%s: control register stuck at %08x, ignoring.
serprog: requested mapping %s is incompatible: 0x%zx bytes at 0x%0*lx.
At least one block is locked and lockdown is active!
block lock at %06x is %slocked!
Reading the status register failed!
Sending disable lockdown failed!
%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x
%s: error sending erase command!
%s: chip did not become ready again after sending the erase command!
%s: cannot erase partial pages: addr=%u, blocklen=%u
%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u
%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u
%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u
%s: cannot erase partial sectors: addr=%u, blocklen=%u
FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x, failed byte count from 0x%08x-0x%08x: 0x%x
Erasing and writing flash chip... Looking for another erase function.
eraseblock layout is known, but matching block erase function is not implemented. block erase function found, but eraseblock layout is not defined. Reading current flash chip contents... Can't read anymore! Aborting.
Warning: Chip content is identical to the requested image.
No usable erase functions left.
%s: man_id 0x%02x, dev_id 0x%06x , man_id seems to be normal flash content , dev_id seems to be normal flash content Chip lacks correct probe timing information, using default 10ms/40us. Chip has negative value in probe_timing, failing without chip access
ERROR: flashrom has no read function for this flash chip.
Error: %s called with start 0x%x + len 0x%x > total_size 0x%x
Verification impossible because read failed at 0x%x (len 0x%x)
pre-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx
post-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx
Total packetsize (%i) is greater than 64 supported, aborting.
Unexpected number of bytes transferred, expected %i, got %i!
STLINK_BRIDGE_GET_RWCMD_STATUS Failed to set the NSS pin to low
Failed to issue the STLINK_BRIDGE_WRITE_SPI command: '%s'
Failed to send the data after the STLINK_BRIDGE_WRITE_SPI command: '%s'
Failed to issue the STLINK_BRIDGE_READ_SPI command: '%s'
Failed to retrive the STLINK_BRIDGE_READ_SPI answer: '%s'
Failed to set the NSS pin to high
%s: tried to physunmap without valid data!
Trying to unmap a nonexisting mapping!
Please report a bug at flashrom@flashrom.org
Chip status register is 0x%02x
Chip status register: Bit 7 / Ready is %sset
Chip status register: Bit 6 / Compare match is %sset
Chip status register: Bit %i is %sset
Chip status register: Density is %u Mb
Chip status register: Bit 1 / Protection is %sset
Chip status register: Bit 0 / "Power of 2" is %sset
%s: total size %i kB, page size %i B
%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u
%s: error sending read command!
%s: cannot write partial pages: start=%u, len=%u
%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u
%s: error sending buffer write!
%s: filling the buffer failed!
%s: error sending buffer to main memory command!
%s: chip did not become ready again!
%s: Retrying read with greater buffer length!
%s: Maximum buffer length reached and data still not ready!
%s: Start address is not page-aligned!
%s: Length is not page-aligned!
%s: Timed out waiting for SPI not busy!
%s: Block erase size is not page size!
%s: Unsupported granularity! Please report a bug at flashrom@flashrom.org
Incomplete SPI bitbang master setting!
Please report a bug at flashrom@flashrom.org
%s: File descriptor is invalid.
Could not fetch original serial port configuration: Could not set custom baudrate: Could not fetch serial port configuration: Warning: given baudrate %d rounded down to %d.
Using slowest possible baudrate: %d.
Could not set serial baud rate: Could not change serial port configuration: Could not fetch new serial port configuration: Some requested serial options did not stick, continuing anyway.
observed wanted
c_cflag: 0x%08lX 0x%08lX
c_lflag: 0x%08lX 0x%08lX
c_iflag: 0x%08lX 0x%08lX
c_oflag: 0x%08lX 0x%08lX
Could not set baud rates exactly.
Actual baud flags are: ispeed: 0x%08lX, ospeed: 0x%08lX
Could not get serial port mode: Could not set serial port mode to blocking: Warning: Automatic command availability check failed for cmd 0x%02x - won't execute cmd
Error: cannot write op code: %s
Error: cannot write parameters: %s
Error: cannot read from device: %s
Error: invalid response 0x%02X from device (to command 0x%02X)
Error: cannot read return parameters: %s
Error: cannot read from device (flushing stream) Error: NAK to a stream buffer operation
Error: Invalid reply 0x%02X from device
Error: cannot malloc command buffer
serprog: Passing write-n bytes=%d addr=0x%x
serprog: Error: cannot write write-n command
serprog: Error: cannot write write-n data Error: could not transfer write buffer
Error: could not execute command buffer
serprog: Executed operation buffer of %d bytes
serprog_delay used, but programmer doesn't support delays natively - emulating
Error: could not execute command buffer before sending SPI commands.
Error: could not allocate SPI send param buffer.
Could not flush command buffer.
serprog: Output drivers disabled
serprog: %s: Warning: could not disable output buffers
%s addr=0x%lx returning 0x%02X
Tried to register more than %i shutdown functions.
Tried to register a shutdown function before programmer init.
Enabling flash write access failed.
Could not open device PICkit2!
Could not set USB device configuration.
Could not claim USB device interface
Command Get Firmware Version failed!
PICkit2 Firmware Version: %d.%d
Command Set SPI Speed failed!
Error: Invalid 'spispeed' value.
Error: No valid device specified.
Use flashrom -p pony_spi:dev=/dev/device[,type=name]
Error: Missing argument for programmer type.
Error: Invalid programmer type specified.
No programmer compatible with %s detected.
No baudrate specified, using the hardware's defaults.
Error: Both host and device specified.
Please use either dev= or ip= but not both.
Error: Neither host nor device specified.
Use flashrom -p serprog:dev=/dev/device:baud or flashrom -p serprog:ip=ipaddr:port
Error: No port specified.
Use flashrom -p serprog:ip=ipaddr:port
Error: serprog cannot open socket: %s
Error: serprog cannot connect: %s
Error: serprog cannot set socket options: %s
serprog: connected - attempting to synchronize
Error: cannot synchronize protocol - check communications and reset device?
Error: NAK to query interface version
Error: Unknown interface version: %d
serprog: Interface version ok.
Error: query command map not supported
Warning: NAK to query supported buses
serprog: Bus support: parallel=%s, LPC=%s, FWH=%s, SPI=%s
Error: SPI operation not supported while the bustype is SPI
serprog: Maximum write-n length is %d
serprog: Maximum read-n length is %d
Error: Could not convert 'spispeed'.
Error: Garbage following 'spispeed' value.
serprog: Warning: Setting the SPI clock rate is not supported!
serprog: Requested to set SPI clock frequency to %u Hz. It was actually set to %u Hz
serprog: Setting SPI clock rate to %u Hz failed!
Error: Initialize operation buffer not supported
Error: Write to opbuf: delay not supported
Error: Single byte read not supported
Error: Read n bytes not supported
Error: Write to opbuf: write byte not supported
serprog: Write-n not supported Error: cannot allocate memory for Write-n buffer
serprog: Maximum read-n length not reported
Warning: NAK to query programmer name
serprog: Programmer name is "%s"
Warning: NAK to query serial buffer size
serprog: Serial buffer size is %d
Error: Execute operation buffer not supported
Error: NAK to initialize operation buffer
Warning: NAK to query operation buffer size
serprog: operation buffer size is %d
Error: could not enable output buffers
serprog: Output drivers enabled
serprog: Warning: Programmer does not support toggling its output drivers
Error: No host specified.
Use flashrom -p serprog:ip=ipaddr:port
Error: No device specified.
Use flashrom -p serprog:dev=/dev/device[:baud]
Opening STLINK-V3 with serial: %s
No STLINK-V3 seems to be connected with serial %s
Could not find any connected STLINK-V3
The spispeed parameter passed with invalid format: %s
Please pass the parameter with a simple number in kHz
Connected to STLink V3 with bridge FW version: %d
Your STLink V3 has too old version of the bridge interface
Please update the firmware with the STSW-LINK007 which can be downloaded from here:
https://www.st.com/en/development-tools/stsw-link007.html Failed to calculate SPI clock prescaler ERROR: Could not get I/O privileges (%s).
Error: iobase= specified, but the I/O base given was invalid.
It must be a multiple of 0x4 and lie between 0x100 and 0xfffc.
Non-default I/O base requested. This will not change the hardware settings.
Using address 0x%x as I/O base for parallel port access.
Error: Invalid device type specified.
Not mapping %s, zero size at 0x%0*lx.
Critical error: open(/dev/mem): %s
Error accessing %s, 0x%zx bytes at 0x%0*lx
In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),
CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.
Please check if either is enabled in your kernel before reporting a failure.
You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but
disabling the other option unfortunately requires a kernel recompile. Sorry!
%s: Could not register shutdown function!
Intel Gigabit NIC w/ SPI EEPROM Controller reports no EEPROM is present.
Intel i210 NIC w/ emulated EEPROM Intel I210 Gigabit w/ SPI flash Flash is in Secure Mode. Abort.
Unable to clear Flash Access Error. Abort
Intel Gigabit NIC w/ SPI flash Intel 10 Gigabit NIC w/ SPI flash Please use flashrom -p ogp_spi:rom=... to specify which flashchip you want to access.
Invalid or missing rom= parameter.
PCI BAR2 (Flash/NVRAM) Control:
Warning! Either the straps are incorrect or you have no flash or someone overwrote the strap values!
Warning: Flash seems unconnected.
%s: hwversion 0x%02x, ediid 0x%02x
%s: mapping %s from 0x%0*lx to 0x%0*lx
Could not map flash chip %s at 0x%0*lx.
Could not map flash chip registers %s at 0x%0*lx.
Write/erase is not working yet on your programmer in its current configuration.
Read is not working on this chip. flashrom has no read function for this flash chip.
Erase is not possible on this chip.
Erase is not working on this chip. flashrom has no erase function for this flash chip.
Write is not possible on this chip.
Write is not working on this chip. flashrom has no write function for this flash chip.
Warning: Address range of region "%s" exceeds the current chip's address space.
Error: Size of the address range of region "%s" is not positive.
Requested regions can not be handled. Aborting.
Programmer doesn't support this chip. Aborting.
Failed to set correct 4BA mode! Aborting.
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Flash image seems to have garbage in the ID location. Disabling coreboot-related checks.
coreboot last image size (not ROM size) is %d bytes.
This coreboot image matches this mainboard.
This coreboot image (%s:%s) does not appear to
be correct for the detected mainboard (%s:%s).
Proceeding anyway because user forced us to.
Aborting. You can override this with -p internal:boardmismatch=force.
Assuming old flash chip contents as ref-file...
Reading old flash chip contents... Checking if anything has changed.
Good, writing to the flash chip apparently didn't do anything.
This means we have to add special support for your board, programmer or flash
chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
-------------------------------------------------------------------------------
You may now reboot or simply leave the machine running.
Please check the connections (especially those to write protection pins) between
the programmer and the flash chip. If you think the error is caused by flashrom
please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
Apparently at least some data has changed.
Your flash chip is in an unknown state.
Get help on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org with the subject "FAILED: "!
-------------------------------------------------------------------------------
DO NOT REBOOT OR POWEROFF!
Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
fmap size exceeds buffer boundary.
Unable to find fmap in provided buffer.
Density encoding is unknown on this chipset.
Density of ICH SPI component with index %d is invalid.
Encoded density is 0x%x while maximum allowed is 0x%x.
Peculiar firmware descriptor, assuming Apollo Lake compatibility.
Peculiar firmware descriptor, assuming Ibex Peak compatibility.
Peculiar firmware descriptor, assuming Wildcat Point compatibility.
Unknown firmware descriptor, assuming 300 series compatibility.
The firmware descriptor looks like a Skylake/Sunrise Point descriptor.
However, the read frequency isn't set to 17MHz (the only valid value).
Please report this message, the output of `ich_descriptors_tool` for
your descriptor and the output of `lspci -nn` to flashrom@flashrom.org
The firmware descriptor has the read frequency set to 17MHz. However,
it doesn't look like a Skylake/Sunrise Point compatible descriptor.
Please report this message, the output of `ich_descriptors_tool` for
your descriptor and the output of `lspci -nn` to flashrom@flashrom.org
writing sector at 0x%lx failed!
%s called with incorrect arguments
Xilinx Parallel Cable III (DLC 5) Flash update failed
byteblaster_preinit
byteblaster_shutdown
stk200_init
stk200_shutdown
dlc5_preinit
dlc5_shutdown
%s: id1 0x%02x, id2 0x%02x , id1 parity violation , id1 is normal flash content , id2 is normal flash content master lock is unlocked!
Unlock: Done!
Status register: 0x%02x.
Disabling lockdown failed!
%s: id1 0x%04x, id2 0x%04x
Trying erase function %zi... not defined. 0x%06x-0x%06x: done. Erase/write done.
%s called with unknown mask
, man_id parity violation Restoring MMIO space at %p
Could not allocate memory!
page_size=%lx
Send SPI failed!
Receive SPI failed
Command Shutdown failed!
Pony SPI shutdown completed.
STLINK_BRIDGE_CLOSE STLINK_BRIDGE_CS_SPI SPI read/write failure: %d
AT45DB321C lock protect %s: unknown page size %d.
Writing page %u failed!
%s: committing page failed!
%s: Unable to enable SPI!
%s: Unable to disable SPI!
%s: Unable to execute 8051!
%s: Unable to disable EDI!
Can't read! Aborting.
ERASE FAILED!
Could not lseek() MSR: %s
Could not read() MSR: %s
Error: %s Using custom baud rate.
Cannot open serial port: Serial port write error!
Empty write
Serial port is unresponsive!
Serial port read error!
Empty read
Error: cannot write command
%s usecs=%d
serprog: readb byteread Ready: Busy: BE SUSPEND: BE RUN/FINISH: BE ERROR: BE OK: PROG ERR: PROG OK: VP ERR: VPP OK: PROG SUSPEND: PROG RUN/FINISH: WP|TBL#|WP#,ABORT: UNLOCK: %s: number of sectors=%u
millivolt Couldn't initialize libusb!
Setting voltage to %i mV.
Command Set Voltage failed!
Command Setup failed!
SI-Prog serbang si_prog ajawe AJAWe Using %s programmer pinout.
serprog: IP %s port %d
Error: cannot resolve %s
serprog: Synchronized
ST_GETVERSION_EXT Failed to query FW version STLINK_BRIDGE_GET_CLOCK SCK frequency set to %d kHz
STLINK_BRIDGE_INIT_SPI You need to be root.
rayer RayeR SPIPGM iobase Using %s pinout.
memory /dev/mem /dev/mem mmap failed: %s
%s: Out of memory!
bprom bios cprom s3 OGP registers Marvell 88SX7042 registers Flash Parameters:
TurnOff=0x%01x
Acc2First=0x%01x
Acc2Next=0x%01x
ALE2Wr=0x%01x
WrLow=0x%01x
WrHigh=0x%01x
Reserved[21:20]=0x%01x
TurnOffExt=0x%01x
Acc2FirstExt=0x%01x
Acc2NextExt=0x%01x
ALE2WrExt=0x%01x
WrLowExt=0x%01x
WrHighExt=0x%01x
Reserved[31:28]=0x%01x
Expansion ROM BAR Control:
ExpROMSz=0x%01x
Bar2En=0x%01x
BAR2TransAttr=0x%01x
BAR2Sz=0x%01x
GPIOPortMode=0x%01x
Activating I/O BAR at 0x%04x
SATA SiI registers %s: reading hwversion failed
%s: reading ediid failed
%s: Unable to reset 8051!
%s: unmapped 0x%0*lx
flash chip registers Reading flash... Read operation failed!
FAILED.
Manufacturer: %s
Mainboard ID: %s
Uh oh. Erase/write failed. Can't even read anymore!
Verifying flash... VERIFIED.
Found fmap at offset 0x%06zx
Out of memory.
unused 300 series Cannon Point 100 series Sunrise Point 9 series Wildcat Point Assuming chipset '%s'.
%s: excessive loops, i=0x%x
retrying.
page 0x%lx failed!
Unknown ICH ICH8 5 series Ibex Peak 6 series Cougar Point 7 series Panther Point 8 series Lynx Point Baytrail 8 series Lynx Point LP 8 series Wellsburg 9 series Wildcat Point LP C620 series Lewisburg fd pd reg5 bios2 reg7 ec reg9 ie 10gbe reg12 reg13 reg14 reg15 512 kB 1 MB 8 MB 16 MB 32 MB 64 MB xilinx byteblastermv Altera ByteBlasterMV stk200 Atmel STK200/300 adapter wiggler Wiggler LPT spi_tt SPI Tiny Tools (SPI_TT LPT) 333k E4>;#$####### $ probe_jedec_common erase_chip_block_jedec getaddrmask probe_jedec_29gl toggle_ready_jedec_common need_erase programmer_map_flash_region programmer_unmap_flash_region get_next_write verify_range probe_en29lv640b edi_chip_probe edi_probe_kb9012 edi_shutdown edi_chip_read edi_chip_write edi_chip_block_erase edi_read at45db_fill_buffer1 at45db_commit_buffer1 at45db_program_page spi_write_at45db spi_erase_at45cs_sector spi_erase_at45db_chip spi_erase_at45db_sector spi_erase_at45db_block spi_erase_at45db_page at45db_erase spi_read_at45db_e8 spi_read_at45db at45db_convert_addr probe_spi_at45db at45db_get_sector_count =* probe_82802ab
% K @B
` %&
- g5 = serialport_config physmap_common undo_physmap register_spi_master serprog_spi_send_command serprog_delay serprog_chip_readb serprog_chip_writeb serprog_shutdown satasii_wait_done
? @ @ @ @ p? B@\(2@ *@Lock status of block at 0x%0*lx is Locked Open (Full Access, Locked Down).
Read/Write Lock, Locked Down.
Invalid lock change from 0x%02x to 0x%02x requested at 0x%0*lx!
Please report a bug at flashrom@flashrom.org
Lock bits at 0x%0*lx not changed.
Lockdown can't be removed at 0x%0*lx! New value: 0x%02x.
Changing lock bits failed at 0x%0*lx! New value: 0x%02x.
Changed lock bits at 0x%0*lx to 0x%02x.
Enabling lockdown FAILED at 0x%0*lx! New value: 0x%02x.
Ignoring RES in favour of RDID.
Ignoring RES in favour of REMS.
%s failed during command execution
Error: WIP bit after WRSR never cleared
Missing status register write definition, assuming EWSR is needed
Block protection is disabled.
Some block protection in effect, disabling...
Need to disable the register lock first... Hardware protection is active, disabling write protection is impossible.
spi_write_status_register failed.
Unsetting lock bit(s) failed.
Block protection could not be disabled!
Chip status register: Block Protect 4 (BP4) is %sset
Chip status register: Block Protect 3 (BP3) is %sset
Chip status register: Block Protect 2 (BP2) is %sset
Chip status register: Block Protect 1 (BP1) is %sset
Chip status register: Block Protect 0 (BP0) is %sset
Chip status register is 0x%02x.
Chip status register: Write Enable Latch (WEL) is %sset
Chip status register: Write In Progress (WIP/BUSY) is %sset
Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset
Chip status register: Block Protect Write Disable (BPL) is %sset
Chip status register: Top/Bottom (TB) is %s
Chip status register: Sector Protect Size (SEC) is %i KB
Chip status register 2 is NOT decoded!
Chip status register: Software Protection Status (SWP): Chip status register: Sector Protection Register Lock (SRPL) is %sset
Chip status register: Erase/Program Error (EPE) is %sset
Chip status register: WP# pin (WPP) is %sasserted
Ignoring security lockdown (if present)
Ignoring status register byte 2
Chip status register: Write Protect Enable (WPEN) is %sset
Chip status register: Bit 6 / Block Protect 4 (BP4) is %sset
Chip status register: Bit 5 / Block Protect 3 (BP3) is %sset
Chip status register: Bit 3 / Block Protect 1 (BP1) is %sset
Chip status register: Bit 2 / Block Protect 0 (BP0) is %sset
Chip status register: Sequential Program Mode Status (SPM) is %sset
Chip status register: WP# disable (WPDIS) is %sabled
Chip status register: Program Fail Flag (P_FAIL) is %sset
Chip status register: Erase Fail Flag (E_FAIL) is %sset
Chip status register: Auto Address Increment Programming (AAI) is %sset
Resulting block protection : %s
Lock status for 0x%06x (size 0x%06x) is %02x, Trying to clear lock for 0x%06x... Warning: Unlock Failed for block 0x%06x
Using clock_gettime for delay loops (clk_id: %d, resolution: %ldns).
Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c %s' if you have a board with such a chip.
Software %d kB bootblock locking is %sactive.
Software 64 kB bootblock locking is %sactive.
Software 16 kB bootblock locking is %sactive.
Hardware bootblock locking (#TBL) is %sactive.
Hardware remaining chip locking (#WP) is %sactive..
Block locking for W39V080FA in dual mode is undocumented.
Hardware bootblock lockout is %sactive.
Cannot add fmap entries to layout - Too many entries.
Error adding layout entry: %s
failed! flashrom has no probe function for this flash chip.
===
SFDP has autodetected a flash chip which is not natively supported by flashrom yet.
The standard operations read and verify should work, but to support erase, write and all other possible features All standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually.
You can help us by mailing us the output of the following command to flashrom@flashrom.org:
'flashrom -VV [plus the -p/--programmer parameter]'
Thanks for your help!
===
%s %s flash chip "%s" (%d kB, %s) mapped at physical address 0x%0*lx.
%s: unknown erase opcode (0x%02x). Please report this at flashrom@flashrom.org
%s: invalid input, please report to flashrom@flashrom.org
Tried to add a duplicate block eraser: %d x %d B with opcode 0x%02x.
Block Eraser %d is already occupied.
Block eraser %d: %d x %d B with opcode 0x%02x
%s: Not enough space to store another eraser (i=%d). Please report this at flashrom@flashrom.org
Receiving SFDP signature failed.
Signature = 0x%08x (should be 0x50444653)
Receiving SFDP revision and number of parameter headers (NPH) failed. The chip supports an unknown version of SFDP. Aborting SFDP probe!
SFDP number of parameter headers is %d (NPH = %d).
Receiving SFDP parameter table headers failed.
SFDP parameter table header %d/%d:
Length %d B, Parameter Table Pointer 0x%06x
SFDP Parameter Table %d supposedly overflows addressable SFDP area. This most
probably indicates a corrupt SFDP parameter table header. Skipping it.
Fetching SFDP parameter table %d failed.
ID of the mandatory JEDEC SFDP parameter table is not 0 as demanded by JESD216 (warning only).
The chip contains an unknown version of the JEDEC flash parameters table, skipping it.
Length of the mandatory JEDEC SFDP parameter table is wrong (%d B), skipping it.
Parsing JEDEC flash parameter table... 3-Byte (and optionally 4-Byte) addressing.
4-Byte only addressing (not supported by flashrom).
Required addressing mode (0x%x) not supported.
volatile and writes to the status register have to be enabled with non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR.
4kB erase opcode is 0x%02x.
4kB erase opcode is not defined.
Flash chip size >= 4 Gb/512 MB not supported.
Flash chip size is bigger than what 3-Byte addressing can access.
It seems like this chip supports the preliminary Intel version of SFDP, skipping processing of double words 3-9.
Erase Sector Type %d Size: 0x%02x
Erase Sector Type %d is unused.
Block size of erase Sector Type %d (2^%d) is too big for flashrom.
Erase Sector Type %d Opcode: 0x%02x
Unhandled programmer parameters (possibly due to another failure): %s
Unhandled programmer parameters: %s
Error: Unknown programmer "%s". Valid choices are:
Couldn't parse the descriptor!
Attempting to read fmap from ROM content.
Cannot read %d bytes at offset %zu
Cannot read %zu bytes at offset %06zx
fmap signature found at %zu but header is invalid.
Binary search failed, trying linear search...
Failed to read fmap from ROM.
Adding fmap layout to global layout.
Failed to add fmap regions to layout.
Attempting to read fmap from buffer.
Failed to read fmap from buffer.
Tried to register more than %i master interfaces.
%s called with incomplete master definition. Please report a bug at flashrom@flashrom.org
%d byte RDID not supported on this SPI controller
RDID byte 0 parity violation. RDID byte 1 parity violation. Can't handle 4-byte address for opcode '0x%02x'
with this chip/programmer combination.
4-byte address requested but master can't handle 4-byte addresses.
%s called for too long a write
%s failed during command execution at address 0x%x
%s: start address not even! Please report a bug at flashrom@flashrom.org
%s: total write length not even! Please report a bug at flashrom@flashrom.org
%s failed during followup AAI command execution: %d
%s failed to disable AAI mode.
%s called, but SPI read chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org
%s called, but SPI write chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org
All programmers need a valid name, but the one with index %d does not!
Programmer %s has neither a device list nor a textual description!
Programmer %s does not have a valid type set!
Programmer %s does not have a valid init function!
Programmer %s does not have a valid delay function!
Programmer %s does not have a valid map_flash_region function!
Programmer %s does not have a valid unmap_flash_region function!
ERROR: Some field of flash chip #%d (%s) is misconfigured.
Please report a bug at flashrom@flashrom.org
ERROR: Flash chip %s erase function %i region %i has size 0. Please report a bug at flashrom@flashrom.org
ERROR: Flash chip %s erase function %i region %i has count 0. Please report a bug at flashrom@flashrom.org
Strange: Empty eraseblock definition with non-empty erase function. Not an error.
ERROR: Flash chip %s erase function %i region walking resulted in 0x%06x bytes total, expected 0x%06x bytes. Please report a bug at flashrom@flashrom.org
ERROR: Flash chip %s erase function %i and %i are identical. Please report a bug at flashrom@flashrom.org
ERROR: Board enable #%d does not define a vendor and board name.
Please report a bug at flashrom@flashrom.org
ERROR: Board enable for %s %s is misdefined.
Please report a bug at flashrom@flashrom.org
timer loop overflow, reduced precision. delay more than 10%% too short (got %lu%% of expected delay), recalculating... delay loop is unreliable, trying to continue OS timer resolution is unusable. OS timer resolution is %lu usecs, Failed to issue the %s command: '%s'
Failed to get %s answer: '%s'
Could not set serial port mode to non-blocking: Could not restore serial port blocking behavior: Could not restore serial port mode to blocking: SPIBAR = 0x%0*lx (phys = 0x%08x)
Vendor ID: %.*s, part ID: %.*s
PC8736x: unexpected ID %02x (expected %02x)
PC87360: invalid GPIO base address %04x
ERROR: Found Winbond chip with ID 0x%x, expected %x
ERROR: winbond_gpio_set: Invalid GPIO number %d
ERROR: GPIO%d is not supported yet on this winbond chip
ERROR: No supported Winbond Super I/O found
ERROR: No IT87 Super I/O GPIO configuration found.
ERROR: IT%02X does not allow setting GPIO%02u.
ERROR: Failed to read IT87 Super I/O GPIO Base.
VIA Apollo ACPI: %sing GPIO%02d.
ERROR: VT82C686 PM device not found.
ERROR: This Intel LPC bridge does not allow setting GPIO%02d
Intel ICH LPC bridge: %sing GPIO%02d.
ERROR: No known Intel LPC bridge found.
ERROR: VT823x ISA bridge not found.
ERROR: VT823x GPIO%02d is not implemented.
%s: empty needle! Please report a bug at flashrom@flashrom.org
Reading the %s register failed!
serprog: Warning: executed operation buffer due to size reasons
serprog: Error: cannot read read-n data %s: SPI controller can not send %d bytes, it is limited to %d bytes
%s: SPI controller can not receive %d bytes, it is limited to %d bytes
OP Type Pre-OP
Pre-OP 0: 0x%02x, Pre-OP 1: 0x%02x
Board match found, but nothing to do?
Reserved bits in BBAR not zero: 0x%08x
Setting BBAR to 0x%08x failed! New value: 0x%08x.
MX25L12835F/MX25L12845E/MX25L12865E MX25L1605A/MX25L1606E/MX25L1608E MX25L1605D/MX25L1608D/MX25L1673E MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F MX25L8005/MX25L8006E/MX25L8008E/MX25V8005 W29C010(M)/W29C011A/W29EE011/W29EE012 W29C010(M)/W29C011A/W29EE011/W29EE012-old unknown Winbond (ex Nexcom) SPI chip Full Access.
Write Lock (Default State).
Write Lock, Locked Down.
Read Lock.
Read/Write Lock.
Read Lock, Locked Down.
Enabled lockdown at 0x%0*lx.
%s: addr=0x%x, len=%d, data:
REMS returned 0x%02x 0x%02x. %s: id1 0x%x, id2 0x%x
RDID returned RES returned %s: id 0x%x
%s: id1 0x%02x, id2 0x%02x
disabled.
ULBPR failed
bottom no sectors are protected
some sectors are protected
all sectors are protected
reserved for future use
en full access
write locked
locked open
write locked down
OK Bottom boot block:
Top boot block:
Lockout bits:
fmap %08x - %08x named %s
Probing for %s %s, %d kB: complete flash Failed to probe chip: %s
Non-SPI, Parallel, LPC, FWH, Programmer-specific, None, Found on %s.
No SFDP signature found.
SFDP revision = %d.%d
ID 0x%02x, version %d.%d
Parameter table contents:
0x%04x: 3-Byte only addressing.
Status register is WREN (0x06).
EWSR (0x50).
Write chunk size is at least 64 B.
1 B only.
Flash chip size is %d kB.
Memory allocation error!
Initializing %s programmer
, Reading ich descriptor... Descriptors don't match!
fmap found at offset 0x%06zx
Failed to realloc.
Cannot read ROM contents.
Am29F002(N)BB unnamed Calibrating delay loop... %luM loops per second, 10 myus = %ld us, 100 myus = %ld us, 1000 myus = %ld us, 10000 myus = %ld us, %ld myus = %ld us, Serial port write error: write successful
writecnt %u wr_bytes %u
wrote %zd bytes
readcnt %u rd_bytes %u
read %zd bytes
Serial port read error: Can't allocate PCI accessor.
Can't allocate PCI device.
SPIBAR BES=0x%x, WG=%d, WSR=%d, WEWS=%d, EO=0x%x , VCL=%d %.*s Using IT87 GPIO base 0x%04x
/dev/cpu/%d/msr MSR was already initialized
Error while opening %s: %s
Did you run 'modprobe msr'?
Dropp Rais No Sector is %sed.
Sector 0a is %s%sed.
Sector 0b is %s%sed.
Sector %2u is %s%sed.
Could not write() MSR: %s
%s: addr=0x%lx len=%zu
invalid Reading OPCODES... Programming OPCODES... op[%d]: 0x%02x, %s, %s
Stuck at 0x%02x
BBAR offset is unknown!
none 0 1 read w/o addr write w/o addr read w/ addr write w/ addr 0x70000-0x7ffff 0x60000-0x7ffff 0x40000-0x7ffff all blocks 1F0000H-1FFFFFH 1E0000H-1FFFFFH 1C0000H-1FFFFFH 180000H-1FFFFFH 100000H-1FFFFFH all Am29F002(N)BT Am29F010 Am29F010A/B Am29F016D Am29F040 Am29F040B Am29F080 Am29F080B Am29LV001BB Am29LV001BT Am29LV002BB Am29LV002BT Am29LV004BB Am29LV004BT Am29LV008BB Am29LV008BT Am29LV040B Am29LV081B AMIC A25L010 A25L016 A25L020 A25L032 A25L040 A25L05PT A25L05PU A25L080 A25L10PT A25L10PU A25L16PT A25L16PU A25L20PT A25L20PU A25L40PT A25L40PU A25L512 A25L80P A25LQ032/A25LQ32A A25LQ16 A25LQ64 A29002B A29002T A29040B A49LF040A Atmel AT25DF021 AT25DF021A AT25DF041A AT25DF081 AT25DF081A AT25DF161 AT25DF321 AT25DF321A AT25DF641(A) AT25DL081 AT25DL161 AT25DQ161 AT25F1024(A) AT25F2048 AT25F4096 AT25F512 AT25F512A AT25F512B AT25FS010 AT25FS040 AT25SF041 AT25SF081 AT25SF161 AT25SF321 AT25SL128A AT26DF041 AT26DF081A AT26DF161 AT26DF161A AT26F004 AT29C010A AT29C020 AT29C040A AT29C512 AT45CS1282 AT45DB011D AT45DB021D AT45DB041D AT45DB081D AT45DB161D AT45DB321D AT45DB321E AT45DB642D AT49(H)F010 AT49BV512 AT49F002(N) AT49F002(N)T AT49F020 AT49F040 AT49F080 AT49F080T AT49LH002 AT49LH004 AT49LH00B4 Bright BM29F040 Catalyst CAT28F512 ENE KB9012 (EDI) ESI ES25P16 ES25P40 ES25P80 ESMT F25L008A F25L32PA F49B002UA Eon EN25B05 EN25B05T EN25B10 EN25B10T EN25B16 EN25B16T EN25B20 EN25B20T EN25B32 EN25B32T EN25B40 EN25B40T EN25B64 EN25B64T EN25B80 EN25B80T EN25F05 EN25F10 EN25F16 EN25F20 EN25F32 EN25F40 EN25F64 EN25F80 EN25P05 EN25P10 EN25P16 EN25P20 EN25P32 EN25P40 EN25P64 EN25P80 EN25Q128 EN25Q16 EN25Q32(A/B) EN25Q40 EN25Q64 EN25Q80(A) EN25QH128 EN25QH16 EN25QH32 EN25QH64 EN25S10 EN25S16 EN25S20 EN25S32 EN25S40 EN25S64 EN25S80 EN29F002(A)(N)B EN29F002(A)(N)T EN29F010 EN29GL064(A)B EN29GL064(A)T EN29GL064H/L EN29GL128 EN29LV040(A) EN29LV640B MBM29F004BC MBM29F004TC MBM29F400BC MBM29F400TC MBM29LV160BE MBM29LV160TE GigaDevice GD25B128B/GD25Q128B GD25LQ128C/GD25LQ128D GD25LQ16 GD25LQ32 GD25LQ40 GD25LQ64(B) GD25LQ80 GD25Q10 GD25Q127C/GD25Q128C GD25Q16(B) GD25Q20(B) GD25Q256D GD25Q32(B) GD25Q40(B) GD25Q512 GD25Q64(B) GD25Q80(B) GD25T80 GD25VQ16C GD25VQ21B GD25VQ40C GD25VQ41B GD25VQ80C Hyundai HY29F002B HY29F002T HY29F040A ISSI IS25LP064 IS25LP128 IS25LP256 IS25WP032 IS25WP064 IS25WP128 IS25WP256 IS29GL064B IS29GL064H/L IS29GL064T IS29GL128H/L 25F160S33B8 25F160S33T8 25F320S33B8 25F320S33T8 25F640S33B8 25F640S33T8 28F001BN/BX-B 28F001BN/BX-T 28F002BC/BL/BV/BX-T 28F004B5/BE/BV/BX-B 28F004B5/BE/BV/BX-T 28F008S3/S5/SC 28F400BV/BX/CE/CV-B 28F400BV/BX/CE/CV-T 82802AB 82802AC Macronix MX23L12854 MX23L1654 MX23L3254 MX23L6454 MX25L1005(C)/MX25L1006E MX25L12805D MX25L1605 MX25L1635D MX25L1635E MX25L2005(C)/MX25L2006E MX25L25635F/MX25L25645G MX25L3205(A) MX25L3205D/MX25L3208D MX25L3206E/MX25L3208E MX25L3235D MX25L3273E MX25L4005(A/C)/MX25L4006E MX25L512(E)/MX25V512(C) MX25L6405 MX25L6405D MX25L6406E/MX25L6408E MX25L6495F MX25R6435F MX25U12835F MX25U1635E MX25U25635F MX25U3235E/F MX25U51245G MX25U6435E/F MX25U8032E MX29F001B MX29F001T MX29F002(N)B MX29F002(N)T MX29F022(N)B MX29F022(N)T MX29F040 MX29GL128F MX29GL320EB MX29GL320EH/L MX29GL320ET MX29GL640EB MX29GL640EH/L MX29GL640ET MX29LV040 MX66L51235F/MX25L51245G Micron/Numonyx/ST M25P05 M25P05-A M25P10 M25P10-A M25P128 M25P16 M25P20 M25P20-old M25P32 M25P40 M25P40-old M25P64 M25P80 M25PE10 M25PE16 M25PE20 M25PE40 M25PE80 M25PX16 M25PX32 M25PX64 M25PX80 M45PE10 M45PE16 M45PE20 M45PE40 M45PE80 N25Q00A..1G N25Q00A..3G N25Q016 N25Q032..1E N25Q032..3E N25Q064..1E N25Q064..3E N25Q128..1E N25Q128..3E N25Q256..1E N25Q256..3E N25Q512..1G N25Q512..3G Micron MT25QL01G MT25QU01G MT25QL02G MT25QU02G MT25QU128 MT25QL128 MT25QL256 MT25QU256 MT25QL512 MT25QU512 V29C51000B V29C51000T V29C51400B V29C51400T V29LC51000 V29LC51001 V29LC51002 Nantronics PMC Pm25LD010(C) Pm25LD020(C) Pm25LD040(C) Pm25LD256C Pm25LD512(C) Pm25LQ016 Pm25LQ020 Pm25LQ032C Pm25LQ040 Pm25LQ080 Pm25LV010 Pm25LV010A Pm25LV016B Pm25LV020 Pm25LV040 Pm25LV080B Pm25LV512(A) Pm29F002B Pm29F002T Pm39LV010 Pm39LV020 Pm39LV040 Pm39LV512 Pm49FL002 Pm49FL004 SST SST25LF020A SST25LF040A SST25LF080(A) SST25VF010(A) SST25VF016B SST25VF020 SST25VF020B SST25VF040 SST25VF040B SST25VF040B.REMS SST25VF064C SST25VF080B SST25VF512(A) SST25WF010 SST25WF020 SST25WF020A SST25WF040 SST25WF040B SST25WF080 SST25WF080B SST25WF512 SST26VF016B(A) SST26VF032B(A) SST26VF064B(A) SST28SF040A SST29EE010 SST29EE020A SST29LE010 SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39SF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST39VF512 SST49LF002A/B SST49LF003A/B SST49LF004A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C M29F002B M29F002T/NT M29F040B M29F400BB M29F400BT M29W010B M29W040B M29W512B M50FLW040A M50FLW040B M50FLW080A M50FLW080B M50FW002 M50FW016 M50FW040 M50FW080 M50LPW080 M50LPW116 M95M02 Sanyo LE25FU106B LE25FU206 LE25FU206A LE25FU406B LE25FU406C/LE25U40CMC LE25FW106 LE25FW203A LE25FW403A LE25FW406A LE25FW418A LE25FW806 LE25FW808 Sharp LH28F008BJT-BTLZ1 LHF00L04 Spansion S25FL004A S25FL008A S25FL016A S25FL032A/P S25FL064A/P S25FL116K/S25FL216K S25FL127S-256kB S25FL127S-64kB S25FL128P......0 S25FL128P......1 S25FL128S......0 S25FL128S......1 S25FL129P......0 S25FL129P......1 S25FL132K S25FL164K S25FL204K S25FL208K S25FL256S......0 S25FL512S SyncMOS/MoselVitelic {F,S,V}29C51001B {F,S,V}29C51001T {F,S,V}29C51002B {F,S,V}29C51002T {F,S,V}29C51004B {F,S,V}29C51004T {S,V}29C31004B {S,V}29C31004T TMS29F002RB TMS29F002RT Winbond W25P16 W25P32 W25P80 W25Q128.V W25Q128.V..M W25Q128.W W25Q128.JW.DTR W25Q16.V W25Q16.W W25Q20.W W25Q256.V W25Q256JV_M W25Q32.V W25Q32.W W25Q40.V W25Q40BW W25Q40EW W25Q64.V W25Q64.W W25Q80.V W25Q80BW W25Q80EW W25X10 W25X16 W25X20 W25X32 W25X40 W25X64 W25X80 W29C020(C)/W29C022 W29C040/P W29C512A/W29EE512 W29GL032CB W29GL032CH/L W29GL032CT W29GL064CB W29GL064CH/L W29GL064CT W29GL128C W39F010 W39L010 W39L020 W39L040 W39V040A W39V040B W39V040C W39V040FA W39V040FB W39V040FC W39V080A W39V080FA W39V080FA (dual mode) W49F002U/N W49F020 W49V002A W49V002FA Zetta Device ZD25D20 ZD25D40 SFDP-capable chip Programmer Opaque flash chip unknown AMIC SPI chip unknown Atmel SPI chip unknown Eon SPI chip unknown Macronix SPI chip unknown PMC SPI chip unknown SST SPI chip unknown ST SPI chip unknown Sanyo SPI chip Generic unknown SPI chip (RDID) unknown SPI chip (REMS) Hh(0I@HPI@H@H@H@H@H@H@H@H@HI@H@H@HpI@H`HIGGIGGGGGGGGGGGGGGGIIGGDIdI------ -@@- ))$ $ **** *++@@+ ++++ check_readwritecnt sp_do_read_n register_par_master spi_get_erasefn_from_opcode sfdp_add_uniform_eraser extract_param $X $X @$X 9 L$X 9# P$X $X $X # $X $X $X @&H A&H 'H 'H 'H 'H (H (H (H (H (H )H )H )H )H )H )H :H :H :H :H b ? b |?
probe_w29ee011 erase_chip_28sf040 default_spi_write_256 default_spi_read probe_spi_st95 spi_write_status_register_flag default_spi_write_aai spi_block_erase_c7 spi_block_erase_62 spi_block_erase_60 spi_write_cmd spi_write_extended_address_register spi_simple_write_cmd probe_spi_at25f probe_spi_res2 probe_spi_res1 probe_spi_rems probe_spi_rdid_generic spi_sfdp_read_sfdp_chunk register_opaque_master v1.2 ; x 4 X- t$ 8 ĞL 4` Tt t ğ D Ġ ( < 4P tp $ T TD \ t d $ T 4 T Tt $ D d$ 4h D| d < ı` D x Է $ tX d dh $ 4H t X 4 , T d D , T $ ! 8! h! ! ! ! " `" " D" D,# d@# T# h# |# # # # # d# $$ 8$ L$ `$ 4 t$ T $ t $ $ $ $ $ % $ % D (% $ \% % % "% $"% 4"& D"$& T"8& d"L& t"`& "t& "& "& "& "& "& "& " ' $# ' T#@' #`' #' #' $' $' $$' 4$' d$ ( $ ( $0( $D( $X( %l( 4%( T%( T'( () T1) d2) $5(* 5L* 7* 9* T:+ 4;L+ T=+ D@+ tB8, Ct, C, 4D, D, Fl- J- 4P . Q. Q. R. $R. DR/ dR/ R,/ R@/ RT/ Rh/ S|/ $S/ DS/ dS/ S/ S/ T 0 DT,0 TL0 U0 $V0 4V0 DV0 TV0 dV1 tV$1 V81 W`1 TWt1 W1 W1 W1 4X1 TX1 tX1 X 2 X2 TY(2 tY<2 YP2 Yd2 Yx2 $Z2 Z2 d[2 \2 ] 3 ^H3 _p3 `3 $c 4 d84 $f4 tg5 i<5 k5 k5 k5 l5 qD6 Dr\6 t6 $t6 t6 Du(7 uH7 Dvt7 tw7 w7 w7 w 8 dxL8 xt8 x8 y8 z8 z 9 t{9 {@9 $~9 ~9 T: 4: t`: t: ā: T: Ć ; 4; ; ; 4,< x< < < < 4D= $= 4= > Ĕl> > D0? ? ? ? @ Կ@ @ @ HB B B ,C C DC t $D t
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AAA L # >+ BBB I(D0c
(D BBBH e
(D BBBI # ? $ ? $$ ? H 8$ ? BBI D(D0w
(C ABBD ](F ABB $ $ @; FKG YDB $ (@I EC 0 $ \@ FFA DP
AABD $ (A F}
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ABG \ & Ig FEF A(D`
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8C0A(B BBBE \ ' K FBB B(A0A8DPN
8A0A(B BBBF D8C0A(B BBBH ( ,L FGE E(K0K8LPr
8A0A(B BBBK H d( O FKL E(A0I8GPB
8D0A(B BBBF 4 ( dP FAA P
AEB AB ( ( P ED M
FD A ) Q3 TV L ,) QE BLB I(A0LpWxAPp
0A(A BBBF @ |) R BGH D(A0Gpy
0D(A BBBG H ) S FBB B(A0C8DP
8A0A(B BBBH H * XTO FBB B(A0A8DP^
8A0A(B BBBF H X* \U4 FBB B(A0A8DP
8D0A(B BBBJ * PV FH`
EE * W FIB B(A0A8GRIqAQIvEtI@BLN]B N`H
8D0A(B BBBD \ h+ [ FIB B(A0A8G
8D0A(B BBBD aWB @ + |w FIB A(A0D`
0D(A BBBE , | 0 , | FFG DPw
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ABC Q(Y0H(F A
ABD E(Z0H(D
ABF Z
ABC W
ABF @ , 4 FGI D(G0D`
0D(A BBBA - T (- % FJB B(A0A8G
8A0A(B BBBH !n^Ba
CbEbZHAgOOHHHHHHHHHHPTSPT[MfTSPT[MfTSPT[}TOOOOHHHHHHHHKT . 4U FHB B(D0A8FPdX``LXHPd
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